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320f876f97
| Author | SHA1 | Date | |
|---|---|---|---|
| 320f876f97 | |||
| 5dea5b81db | |||
| b73f92ef88 | |||
| 0f5ac310e8 | |||
| 86a3d307b2 |
6
main.py
6
main.py
@ -1,6 +0,0 @@
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def main():
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print("Hello from dp32-proto!")
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if __name__ == "__main__":
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main()
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@ -29,7 +29,7 @@ class OpcodeActions(Enum):
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LOAD = auto()
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STORE = auto()
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BRANCH = auto()
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MEM_BRANCH = auto()
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IND_BRANCH = auto()
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OpA = OpcodeActions
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70
src/vm.py
70
src/vm.py
@ -1,6 +1,6 @@
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from dataclasses import dataclass, field
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from typing import ClassVar, Callable, Any
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from typing import ClassVar, Callable
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from ctypes import c_uint32, c_int32, c_uint8
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import struct
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from optable import OPCODES, OpcodeDescription, OpL, OpA, OpF, OpD
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@ -16,13 +16,18 @@ class Condition:
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self.n: bool = bool(cond & (1 << 1))
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self.z: bool = bool(cond & (1 << 0))
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class VMCC(IntFlag):
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OVERFLOW = 1 << 2
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NEGATIVE = 1 << 1
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ZERO = 1 << 0
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@dataclass
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class VM:
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instr_callbacks: ClassVar[dict[OpcodeDescription, Callable]]
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def __init__(self, mem):
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self.mem: bytearray = mem
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self.cc: c_uint8 = c_uint8(0)
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self.cc: VMCC = VMCC(0)
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self.pc: c_uint32 = c_uint32(0)
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self.registers: list[c_int32] = [c_int32(0) for _ in range(256)]
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self.breakpoints: set[int] = field(default_factory=set)
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@ -86,7 +91,7 @@ class VM:
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self._branch_callback,
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OpD(OpF.QUICK, OpL.BRANCH, OpA.BRANCH):
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self._branch_callback,
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OpD(OpF(0), OpL.BRANCH, OpA.MEM_BRANCH):
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OpD(OpF(0), OpL.BRANCH, OpA.IND_BRANCH):
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self._branch_indexed_callback
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}
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@ -94,12 +99,16 @@ class VM:
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"""
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Make one step (only step into)
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"""
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# По какой-то причине адрессация работает
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# так, будто мы на 1 слово впереди опкода
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if not VMFlags.AFTER_BRANCH:
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self.pc = c_uint32(self.cc.value + 1)
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# сбрасываем флаг AFTER_BRANCH
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self._vm_flags &= ~(VMFlags.AFTER_BRANCH)
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opcode = self.mem[self.pc.value]
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opdesc = self._fetch_opcode_desc(opcode)
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args = self._parse_arguments(opdesc)
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if not VMFlags.AFTER_BRANCH:
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self.pc = c_uint32(self.cc.value + 1)
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self._vm_flags &= ~(VMFlags.AFTER_BRANCH)
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self._run_callback(opdesc, args)
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def continue_(self) -> None:
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"""
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@ -142,7 +151,39 @@ class VM:
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self.instr_callbacks[opdesc](
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r3, r1, r2_or_i8
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)
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if opdesc.layout == OpL.MEM
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if opdesc.layout == OpL.MEM:
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if OpF.QUICK in opdesc.flags:
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assert len(args) == 4
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_, r3, r1, i8 = args
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self.instr_callbacks[opdesc](
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r3, r1, i8
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)
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else:
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assert len(args) == 5
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_, r3, r1, _, disp = args
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self.instr_callbacks[opdesc](
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r3, r1, disp
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)
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if opdesc.layout == OpL.BRANCH:
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if OpF.QUICK in opdesc.flags:
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assert len(args) == 4
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_, cond, _, i8 = args
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self.instr_callbacks[opdesc](
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cond, i8
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)
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elif opdesc.action == OpA.IND_BRANCH:
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assert len(args) == 5
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_, cond, r1, _, disp = args
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self.instr_callbacks[opdesc](
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cond, r1, disp
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)
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else:
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assert len(args) == 5
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_, cond, _, _, disp = args
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self.instr_callbacks[opdesc](
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cond, disp
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)
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def _math_callback_gen(
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self,
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@ -157,6 +198,7 @@ class VM:
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lhs = self.registers[r1].value
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rhs = self.registers[r2].value
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self.registers[r3] = c_int32(operation(lhs, rhs))
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return callback
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def _math_quick_callback_gen(
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@ -172,8 +214,19 @@ class VM:
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операций с пометкой QUICK
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"""
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def callback(self, r3: int, r1: int, i8: int) -> None:
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self.cc = VMCC(0)
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lhs = self.registers[r1].value
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self.registers[r3] = c_int32(operation(lhs, i8))
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result = operation(lhs, i8)
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if result < 0:
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self.cc |= VMCC.NEGATIVE
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elif result == 0:
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self.cc |= VMCC.ZERO
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# самая дорогая проверка на переполнение)
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try:
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struct.pack('i', result)
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except struct.error:
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self.cc |= VMCC.OVERFLOW
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self.registers[r3] = c_int32(result)
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return callback
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def _load_callback(self, r3: int, r1: int, disp: int) -> None:
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@ -200,3 +253,4 @@ class VM:
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self._vm_flags |= VMFlags.AFTER_BRANCH
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addr = self.registers[r1].value + disp
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self.pc = c_uint32(addr)
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